As electronic devices have been downsized and have enhanced their densities and functions, semiconductor devices mounted on the electronic devices have been requested to be downsized and thinned. What is proposed as a configuration of the semiconductor device in response to the request for downsizing and thinning the semiconductor device is a semiconductor package (surface mounting type package) such as Ball Grid Array (BGA). The semiconductor package is such that a semiconductor chip is packaged on a wiring board, e.g., a printed board, a buildup board, etc. As power consumption has increased due to higher performance and upsizing of the semiconductor chip, an exothermic quantity of the semiconductor chip has increased to a great degree. The semiconductor chip has a large elastic modulus in comparison with the wiring board, and hence there is a case in which the wiring board is warped due to a thermal stress with the result that a crack is caused in an insulating layer of the wiring board. There is a known technology for preventing the crack from being caused in the insulating layer of the wiring board.
[Patent document 1] Japanese Laid-open Patent Publication No. 2005-159133    [Patent document 2] Japanese Laid-open Patent Publication No. 2006-186286    [Patent document 3] Japanese Laid-open Patent Publication No. 2009-076721
When the crack is caused in the insulating layer of the wiring board, what is requested is to restrain a spread of the crack caused in the insulating layer. There is a method for restraining the spread of the crack caused in the insulating layer of the wiring board by shifting wiring arrangements in respective layers of the wiring board. If the wirings arranged in the respective layers of the wiring board become excessively close to each other, a voltage fluctuation of the wirings in one side affects a voltage of the wirings in the other side, resulting in a possibility of deteriorating electric characteristics of the wirings arranged in the respective layers.